Forschungsbericht 2025
Massively Parallel Systems E-EXK5
Leitung: Lal, Sohan
Gründungsdatum: 1.9.2021
Institut auf TORE
Institutswebsite
The institute of Massively Parallel Systems (MPS) investigates and teaches in the field of computer architecture, focussing on massively parallel systems.
These days massively parallel systems are present everywhere – in our smartphones, cars, supercomputers. They help us to do many things which were not possible before. For example, the recent stupendous success of machine learning, especially deep learning, is mainly due to the exponential increase in computational power. As such, machine learning is not new. Machine learning methods are around since the 1950s. What has predominately changed now is the computing power, with many-core processors such as GPUs as the main drivers. If these massively parallel processors are not utilized properly, they are very expensive in terms of power and energy consumption, which is not good as we aspire to reduce our carbon footprint. At MPS, we are working to make computing devices more performance and energy-efficient from the architecture perspective, and improve their programmability from a programmer’s perspective.
Publikationen
-
A portable compiler-runtime approach for scalability prediction - Journal Article
Stawinoga, Nicolai; Lal, Sohan; Cosenza, Biagio; Salzmann, Philip; Thoman, Peter; Fahringer, Thomas
Future Generation Computer Systems 179: 108337 (2026)
Open Access | Publisher DOI
-
Robust LFSR-based scrambling to mitigate stencil attack on main memory - Journal Article
Kumar, Gaurav; Nanote, Kushal Pravin; Lal, Sohan; Prasad, Yamuna; Ahlawat, Satyadev
ACM Transactions on Embedded Computing Systems 24 (5s): 102 (2025)
Open Access | Publisher DOI
-
On enhancing the security against memory disclosure attacks - Conference Paper
Ghosh, Prokash; Kumar, Gaurav; Lal, Sohan; Ahlawat, Satyadev; Virendra Singh
IEEE 38th International System-on-Chip Conference, SOCC 2025
Publisher DOI
-
Enhancing Practicality of Memory Compression for GPUs with High-Throughput Simplifications - Conference Paper
Renz, Manuel; Lal, Sohan
22nd ACM International Conference on Computing Frontiers, CF 2025
Open Access | Publisher DOI
-
AI-driven anomaly detection in oscilloscope images for post-silicon validation - Conference Paper
Akash, Kowshic A.; Wulf, Tobias; Valentin, Torsten; Geist, Alexander; Kulau, Ulf; Lal, Sohan
38th International Conference on VLSI Design and 24th International Conference on Embedded Systems, VLSID 2025
Open Access | Publisher DOI
-
Case Study: AI-Driven Log Extraction and Trace Outlier Detection for Efficient Post-Silicon Validation - Conference Paper
Akash, Kowshic A.; Wulf, Tobias; Valentin, Torsten; Geist, Alexander; Kulau, Ulf; Jose, John; Lal, Sohan
26th IEEE Latin-American Test Symposium, LATS 2025
Open Access | Publisher DOI
-
ClusterSim: modeling thread block clusters in hopper GPUs - Conference Paper
Lühnen, Tim Julius; Behera, Jyotirman; Tripathy, Devashree; Lal, Sohan
IEEE International Symposium on Workload Characterization, IISWC 2025
Open Access | Publisher DOI